RISC-V
Providers using this tag (14)
Ranked by API Evangelist rating — Exemplar and Strong are expanded by default.
Thin 2 Limited public surface area
Emerging 5 Early or largely undocumented
RISC-V InternationalRISC-V International advances the RISC-V open standard instruction set architecture (ISA), promoting open h...AkeanaAkeana is a semiconductor IP company building high-performance RISC-V processor system IP, with the stated ...CartesiCartesi is a Linux-based optimistic rollup protocol that lets developers build decentralized applications b...Efficient ComputerEfficient Computer builds general-purpose, energy-minimal processors for edge and embedded AI. Its Fabric a...TenstorrentTenstorrent is an AI hardware company designing Tensix and Tensix++ based AI accelerators on the open RISC-...
Minimal 7 Almost no public developer surface
CHIPS AllianceCHIPS Alliance is a Linux Foundation project (founded in 2019) that develops open-source hardware (silicon)...NextSiliconNextSilicon is a deep-tech compute company building intelligent, software-defined acceleration hardware for...MipsMIPS is a processor IP and compute company building embedded and edge AI silicon for automotive, robotics, ...AheadComputingAheadComputing Inc. is a Portland, Oregon fabless semiconductor startup founded in 2024 by former Intel CPU...Bouffalo LabBouffalo Lab (博流智能) is a fabless chip design company founded in 2016 and headquartered in Nanjing, China, f...ArilincAril Inc. (Arilinc) is a fabless semiconductor company in Los Gatos, California designing efficient AI proc...RivosRivos is a Santa Clara-based silicon startup founded in 2021 that designs data-center class GPUs and AI acc...
APIs with this tag (5)
Ranked by the provider's API Evangelist rating — the Kin Score is scored per provider, not per API, so every API of a provider shares its band. How the rating works →
Emerging 5 Early or largely undocumented
RISC-V C API DocumentationDocumentation of the RISC-V C API including calling conventions, ABI specifications, compiler intrinsics, a...RISC-V ISA SpecificationsThe canonical RISC-V Instruction Set Architecture specifications including the Unprivileged ISA (RV32I/RV64...RISC-V Non-ISA SpecificationsSupporting technical standards that do not add new instructions or modify the RISC-V ISA but help develop t...RISC-V OpenSBIOpenSBI is the official open-source implementation of the RISC-V Supervisor Binary Interface (SBI) specific...RISC-V Spike ISA SimulatorSpike is the official RISC-V ISA Simulator and the golden reference implementation for RISC-V. It simulates...
Score breakdown
Frequency
35.4
log-scaled weighted occurrences
Breadth
0.4
spread across providers
Quality lift
15.9
mean composite of providers using it
Cohesion
1.1
strength of nearest seed neighbor
Related tags
Where this tag comes from
Provider tag14
Api tag5