# RISC-V International

**Canonical:** https://apis.io/providers/risc-v/  
**Website:** https://riscv.org/  
**APIs profiled:** 5

RISC-V International advances the RISC-V open standard instruction set architecture (ISA), promoting open hardware development and reducing dependency on proprietary processor designs. The organization maintains the canonical RISC-V ISA specifications, profiles, non-ISA specifications, extensions, and a rich ecosystem of open-source tools including simulators, compilers, debuggers, and verification frameworks.

## Kin Score — 21.7 / 100 (emerging)

Scored 2026-08-20 under rubric 0.12.0. Trend: flat (+0.0 from 21.7).

| Facet | Score |
|---|---|
| Discoverability | 64.8 |
| Contract Quality | 11.3 |
| Governance | 25.0 |
| Contract Governance | 25.0 |
| Operational Transparency | 13.2 |
| Developer Ergonomics | 11.9 |
| Commercial Clarity | 26.3 |
| Access Clarity | 26.3 |

## Agent readiness — 3.0 (human-only)

| Dimension | Value |
|---|---|
| Spec Presence | no |
| Agentic Access | no |
| Reversibility Documented | no |
| MCP Server | no |
| Auth Clarity | no |
| Idempotency | no |
| Error Semantics | no |
| OpenAPI Examples | no |
| Rate Limit Signal | documented |
| Event Surface Described | no |
| Agent Skills | no |
| Well Known Catalog | no |
| Consent Identity | no |
| Agent Card | no |
| Dry Run Mode | no |

## Access

Freemium — onboarding: unknown, pricing: freemium, trial: no (confidence: medium).

## APIs (5)

- **RISC-V ISA Specifications** — The canonical RISC-V Instruction Set Architecture specifications including the Unprivileged ISA (RV32I/RV64I base integer instructions) and Privileged Architecture specification...
- **RISC-V C API Documentation** — Documentation of the RISC-V C API including calling conventions, ABI specifications, compiler intrinsics, and architectural extension interfaces for C/C++ development targeting ...
- **RISC-V Non-ISA Specifications** — Supporting technical standards that do not add new instructions or modify the RISC-V ISA but help develop the ecosystem, including platform specifications, debug specifications,...
- **RISC-V Spike ISA Simulator** — Spike is the official RISC-V ISA Simulator and the golden reference implementation for RISC-V. It simulates the execution of RISC-V programs and is used for architecture validat...
- **RISC-V OpenSBI** — OpenSBI is the official open-source implementation of the RISC-V Supervisor Binary Interface (SBI) specification. It provides a firmware execution environment for M-mode privile...

## Security (1)

- **Risc V Domain Security** — TLSv1.3 · HSTS · DMARC

## Plans (1)

- **Risc V Plans Pricing**

## Tags

C API, Compiler, Hardware, Instruction Set Architecture, Linux Foundation, Open Hardware, Open-Source, Processor, RISC-V, Simulator

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Profiled by [API Evangelist](https://apievangelist.com) and published on [APIs.io](https://apis.io/providers/risc-v/). Scores are computed from the provider's own public artifacts under a published rubric.
